1. Field of the Invention
The present invention relates to a voltage controlled oscillator.
2. Description of the Related Art
Generally, a voltage controlled oscillator is employed in a phase locked loop (PLL) circuit to control the frequency of an oscillation signal. An exemplary circuitry arrangement is shown in FIG. 1. As shown in FIG. 1, when the voltage level at an input terminal 11 is shifted from a first voltage of V to a second voltage V+xcex94V, the frequency of the oscillation signal outputted from an output terminal 12 varies from F to F+xcex94F.
In the conventional voltage controlled oscillator, the input terminal 11 is connected to the gate of an N-channel MOS (n-channel metal oxide semiconductor) transistor or a P-channel MOS (p-channel metal oxide semiconductor) transistor. Current supplied to a train of inverters is varied to control the oscillation signal frequency.
The frequency of the oscillation signal generated by a train of inverters 14 is proportional to the current flowing through a second P-channel MOS transistor 102. The current flowing through the second P-channel MOS transistor 102 is proportional to the current flowing through a first P-channel MOS transistor 101. The current flowing through the first P-channel MOS transistor 101 is equal to the current flowing through a first N-channel MOS 201. When the voltage at the input terminal 11 is shifted from the ground level to the power supply voltage level, any current does not flow through the first N-channel MOS transistor 201 until the voltage at the input terminal 11 rises up to a threshold voltage of the first N-channel MOS transistor 201.
When the voltage at the input terminal 11 exceeds the threshold voltage of the first N-channel MOS transistor 201, the current flows through the first N-channel MOS transistor 201. As the voltage at the input terminal 11 is increased, the current flowing through the first N-channel MOS transistor 201 increases. However, at this time, the voltage at the first terminal 13 decreases, so that the current is gradually saturated.
FIGS. 2A and 2B show two examples of the inverter 14 used in the above voltage controlled oscillator. FIG. 2A shows an arrangement one inverter. In FIG. 2A, the inverter is provided between the power supply voltage 20 and the ground 21. Reference numerals 22 and 23 denote an input and an output. FIG. 2B shows the inverter composed of an N-channel MOS transistor and a P-channel MOS transistor.
The relation between the input voltage V at the input terminal 11 and the frequency F of the oscillation signal outputted from the voltage controlled oscillator is as shown in FIG. 3. As seen from FIG. 3, the voltage at the input terminal 11 is limited to a range of 0.8 to 2.5 V and the operation frequency range is up to 300 MHz. Also, a ratio xcex94F/xcex94V increases simply. On contrary, when the input terminal 11 is connected to the gate of the P-channel MOS transistor in the voltage controlled oscillator, the input terminal 11 is similarly limited, and the ratio xcex94F/xcex94V decreases simply.
It is assumed that when the voltage at the input terminal is varied, the frequency of the oscillation signal outputted from the output terminal changes in a range between the minimum, FMIN and the maximum, FMAX. Also, variations in the performance of the oscillator are derived from deviation in the manufacturing conditions of the oscillator, deviations caused based on change in the operating temperature and deviation caused based on the change of the power supply voltage of the oscillator.
In consideration of all types of the variations of the performance, the best condition is established in a case of a maximum of gain, and the worst condition is established in case of a minimum of gain. The normal condition is established with no deviation between the best condition and the worst condition. In this case, a frequency range between the minimum FMIN and the maximum FMAX is referred to as an operation frequency range. In the conventional voltage controlled oscillator, either or both of FMIN and FMAX of the oscillation frequency are increased or decreased depending on the deviations. Therefore, when the deviations of the performance are large, the operation frequency range becomes narrow.
Recently, a fine pattern technique is applied to the components of an oscillator, and the power supply voltage is decreased. Therefore, the variations of the performance increase so that the operation frequency range is undesirably narrowed. For widening the operation frequency-range, it is necessary to increase the gain xcex94F/xcex94V where xcex94F is a change in the frequency of the oscillation signal outputted from the output terminal and xcex94V is a change in the voltage at the input terminal.
However, since the input terminal of the voltage controlled oscillator receives an analog voltage, the increase of the gain may cause the fluctuation or jitter in the period of the oscillation signal outputted from the output terminal.
In conjunction with the above description, a voltage controlled oscillation circuit is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei 9-312521). In this reference, the voltage controlled oscillation circuit is provided to have linear control voltagexe2x80x94oscillation frequency characteristic over a wide range while keeping noise endurance. For this purpose, an input control voltage VC is compensated for by a linear compensating circuit (2) which has a voltage conversion characteristic inverse to the control voltagexe2x80x94oscillation frequency characteristic of the voltage controlled oscillation circuit (3). The oscillation frequency of the voltage controlled oscillation circuit (3) is controlled based on the control voltage Vxe2x80x2C obtained by the voltage converting operation.
Also, a voltage controlled oscillator having efficient process compensation is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei 9-508762). In this reference, a voltage controlled oscillator (VCO) circuit gives an output signal having an output frequency with the least change to an optionally predetermined input control voltage regardless of a manufacturing process change, a temperature change and a power supply voltage change. The VCO circuit contains a multi-stage ring oscillator which contains a plurality of current depletion inverters connected in series. The VCO circuit uses a first current source to give a substantially constant current independent from a process change, a temperature change and a power supply voltage change, and a second current source to give a variable current in response to the process change, the temperature change and the power supply voltage change. Both of the current sources generate current signals independent from the input signal to the VCO circuit. An attenuator gives a control current signal to the ring oscillator in response to an input voltage signal from a phase locked loop filter to the VCO circuit. The attenuator receives a supply current signal produced by subtracting the second current signal from the first current signal, and use a difference auxiliary circuit to attenuate the supply current signal in response to an input voltage to generate a control current signal which sets a current level of the cells of the ring oscillator. The oscillation frequency of the ring oscillator is determined based on the control current signal. Moreover, the VCO circuit includes a current mirror circuit to receive the control current signal from the attenuator and to reflect the control current signal to the ring oscillator.
Therefore, an object of the present invention is to provide a voltage controlled oscillator which can have a wide operation frequency range.
In order to achieve an aspect of the present invention, a voltage controlled oscillator includes a first converter, a second converter and an oscillator. The first converter outputs a first current proportional to an input voltage. In this case, an increase rate of the first current is decreased as the input voltage is increased. The second converter outputs a second current proportional to the input voltage. An increase rate of the second current is increased as the input voltage is increased. The oscillator outputs an oscillation signal in response to a summation of the first current and the second current.
Here, it is desirable that the summation of the first current and the second current increases substantially linearly as the input voltage is increased.
Also, the oscillator desirably outputs the oscillation signal having a frequency proportional to the summation of the first current and the second current.
Also, a voltage range of the input voltage may be substantially from a first threshold voltage of a MOS transistor to (a power supply voltagexe2x80x94a second threshold voltage of another MOS transistor).
Also, the first converter may include a first P-channel MOS transistor and a first N-channel MOS transistor which are connected in series between a power supply voltage and a ground, and a second P-channel MOS transistor connected with the power supply voltage and outputting the first current to the oscillator. The input voltage is supplied to a gate of the first N-channel MOS transistor. The drain and gate of the first P-channel MOS transistor and the gate of the second P-channel MOS transistor are connected with each other.
Also, the second converter may include third and fourth P-channel MOS transistors connected in parallel between the power supply voltage and a common node, a second N-channel MOS transistor connected between the common node and the ground, and a fifth P-channel MOS transistor connected with the power supply voltage and outputting the second current to the oscillator. The gate of the second N-channel MOS transistor is connected to the power supply voltage. Also, the gate of the third P-channel MOS transistor is connected to the input voltage, and the gate of the fourth P-channel MOS transistor is connected with the common node and a gate of the fifth P-channel MOS transistor.
Also, the oscillator may include inverters of an odd number connected in series.
In another aspect of the present invention, a method of generating an oscillation signal is attained by generating a first current proportional to an input voltage, an increase rate of the first current is decreased as the input voltage is increased; by generating a second current proportional to the input voltage, an increase rate of the second current is increased as the input voltage is increased; and by generating an oscillation signal in response to a summation of the first current and the second current.
Here, it is desirable that the summation of the first current and the second current increases substantially linearly.
Also, the oscillation signal desirable has a frequency proportional to the summation of the first current and the second current.
Also, a voltage range of the input voltage may be substantially from a first threshold voltage of a MOS transistor to (a power supply voltagexe2x80x94a second threshold voltage of another MOS transistor).
In order to achieve still another aspect of the present invention, a voltage controlled oscillator include a first converter outputting a first current proportional to an input voltage, a second converter outputting a second current proportional to the input voltage, and an oscillator outputting an oscillation signal in response to a summation of the first current and the second current, the summation increases substantially linearly as the input voltage is increased.
Here, it is desirable that an increase rate of the first current is decreased as the input voltage is increased, and an increase rate of the second current is increased as the input voltage is increased.
Also, the oscillator desirably outputs the oscillation signal having a frequency proportional to the summation of the first current and the second current.
Also, a voltage range of the input voltage may be substantially from a first threshold voltage of a MOS transistor to (a power supply voltagexe2x80x94a second threshold voltage of another MOS transistor).
Also, the first converter may include a first P-channel MOS transistor and a first N-channel MOS transistor which are connected in series between a power supply voltage and a ground, and a second P-channel MOS transistor connected with the power supply voltage and outputting the first current to the oscillator. The input voltage is supplied to a gate of the first N-channel MOS transistor. The drain and gate of the first P-channel MOS transistor and the gate of the second P-channel MOS transistor are connected with each other.
Also, the second converter may include third and fourth P-channel MOS transistors connected in parallel between the power supply voltage and a common node, a second N-channel MOS transistor connected between the common node and the ground, and a fifth P-channel MOS transistor connected with the power supply voltage and outputting the second current to the oscillator. The gate of the second N-channel MOS transistor is connected to the power supply voltage. Also, the gate of the third P-channel MOS transistor is connected to the input voltage, and the gate of the fourth P-channel MOS transistor is connected with the common node and a gate of the fifth P-channel MOS transistor.
Also, the oscillator may include inverters of an odd number connected in series.
In yet still another aspect of the present invention, a method of generating an oscillation signal in a voltage controlled oscillator, is attained by generating a first current proportional to an input voltage; by generating a second current proportional to the input voltage, a summation of the first current and the second current increasing substantially linearly as the input voltage is increased; and by generating an oscillation signal having a frequency proportional to the summation of first current and the second current.
Here, it is desirable that an increase rate of the first current is decreased as the input voltage is increased, and an increase rate of the second current is increased as the input voltage is increased.
Also, a voltage range of the input voltage is substantially from a first threshold voltage of a MOS transistor to (a power supply voltagexe2x80x94a second threshold voltage of another MOS transistor).